Fix CUDA error: an illegal memory access was encountered in Ollama & Llama.cpp
CUDA error: an illegal memory access was encountered (cudaErrorIllegalAddress)
Root Cause & Memory Allocation Mechanics
Because CUDA kernel launches are asynchronous, the GPU hardware exception (`cudaErrorIllegalAddress`, code 700) is almost always reported on the *next* synchronous call (`cudaStreamSynchronize` or `cudaMemcpy`), masking the true offending operation unless `CUDA_LAUNCH_BLOCKING=1` is exported. Software triggers include pairing experimental `q4_0` KV-cache quantization with non-standard head dimensions (`headDim = 80` or `256`) or multi-GPU PCIe P2P transfers across mismatched IOMMU groups. Hardware triggers are equally common: sustained matrix-multiplication bursts push GDDR6X junction temps past 102°C on RTX 3090 cards or cause microsecond power spikes that trip marginal PCIe riser cables and daisy-chained 8-pin PSU rails.
Exact CLI Remediation Commands
# 1. Isolate software vs hardware fault by disabling FlashAttention & KV quant temporarily
export OLLAMA_FLASH_ATTENTION=0
export OLLAMA_KV_CACHE_TYPE=f16
export CUDA_LAUNCH_BLOCKING=1
ollama serve
# 2. Disable memory-mapped weights and reduce micro-batch size (-ub 256)
./llama-server -m model.gguf -ngl 95 --no-mmap -b 512 -ub 256 -c 8192
# 3. Stabilize GPU power draw & GDDR6X thermals (run as Administrator/root):
nvidia-smi -pl 280
# Disable custom all-reduce and CUDA graphs to isolate multi-GPU P2P faults
export CUDA_LAUNCH_BLOCKING=1
vllm serve model --enforce-eager --disable-custom-all-reduce
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Frequently Asked Questions
Why does cudaErrorIllegalAddress happen only on LLM inference and not in gaming benchmarks?
LLM inference stresses all VRAM chips and Tensor Cores simultaneously while filling 95%+ of memory addresses. A single unstable GDDR6X/GDDR7 module at the top of the 24GB address space will never be touched by a 10GB game, but immediately crashes a 22GB LLM.
Can a PCIe riser cable or daisy-chained PSU cable cause illegal memory access errors?
Yes! Unshielded PCIe 3.0 risers running at PCIe 4.0/5.0 speeds corrupt DMA packet CRCs during layer transfers. Always force `PCIe Gen 3` in BIOS when using older risers and run dedicated 8-pin / `12V-2x6` power cables from an ATX 3.1 PSU.
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